1. acoustic device countermeasures – создание помех акустический прибором;

2. air data computer – вычислитель воздушных сигналов; ЭВМ системы обработки полетных данных; ЭВМ системы обработки данных воздушной обстановки;

3. air data converter – преобразователь полетных данных; преобразователь данных воздушной обстановки;

4. Air Defense Command – Командование ПВО;

5. air defense computer – ЭВМ системы ПВО;

6. airborne digital computer – бортовая цифровая вычислительная машина; БЦВМ;

7.ampere direct current – сила постоянного тока в амперах;

8. – аналого-цифровое преобразование; преобразование из аналоговой формы в цифровую;

9. – аналого-цифровой преобразователь; АЦП;

10. – аналого-цифровая ЭВМ; аналого-цифровой вычислитель;

11. – аналого-цифровой преобразователь; АЦП;

12. apparent diffusion coefficient – кажущийся коэффициент диффузии;

13. apparent digestion coefficient – истинный коэффициент переваримости;

14. applied data communications – передача прикладных данных;

15. area data center – региональный центр информации;

16. automated data collection – автоматизированный сбор данных;

17. automatic degaussing circuit – система автоматического размагничивания;

18. automatic digital calculator – автоматический цифровой калькулятор;

19. automatic disk changer – устройство автоматической смены дисковых инструментальных магазинов;

20. automatic drift control – автоматическое измерение величины дрейфа

#### Смотреть что такое ADC в других словарях

сокр. от Allergic Disease Center Центр по изучению аллергических заболеваний

воен. assistant division commander (сокр. ADC)заместитель командира дивизии (замкомдив)

ADC I analog-to-digital converter noun аналогово-цифровой преобразовательII aide-de-camp noun адъютант

I сокр. от analog-to-digital converter аналогово-цифровой преобразователь II сокр. от aide-de-camp адъютант

аналого-цифровой преобразователь– dual-slope ADC– flash ADC– half-flash ADC

автоматизированный прием данных о транзакциях

сокр. от 1. Aerospace Defense Command 2. Air Defense Command (воен.)

см. Asian Development Centre

сокр. от Amateur Dramatic Club

### ADC CALL

банк. сокр. от acquisition, development and construction loan

1. An analog-to-digital converter (ADC, A/D, or A to D)

2. officially known as Marksmen could refer to champions who have been tagged as Attack Damage Carries in League of Legend.

An (ADC) analog-to-digital converter is a device that converts a continuous physical quantity (usually voltage) to a digital number that represents the quantity’s amplitude.

Get the mug.

Attack Damage Carry – In MOBAs like League of Legends or SMITE, players tagged as ‘adc’ are supposed to deal the majority of their damage through auto-attacks. ADC-s usually have big attack speed and power, but somewhat low defences.

ADC or AD Carry should be an ‘Assassin’.

A: I wake up at night and cry, I do not want her to see me like this, but should I try to talk to her? I’ve given her some space. I need closure but still think this could be salvaged.

M: Honestly, I don’t think so. She thinks you are gay. ADC

A person who mains ADC in League of Legends. The person is usually forced into playing the role by his friends, because no one wants to play that shit. An ADC Main is usually masochistic and enjoys suffering.

A: That guy is an ADC Main right? He must be masochistic then.

B: Lol probably. I heard he wants to play Mid, but he can’t since no one will play ADC.

“A2D” redirects here. For the U.S. Navy attack aircraft, see Douglas A2D Skyshark.

In electronics, an analog-to-digital converter (ADC, A/D, or A-to-D) is a system that converts an analog signal, such as a sound picked up by a microphone or light entering a digital camera, into a digital signal. An ADC may also provide an isolated measurement such as an electronic device that converts an analog input voltage or current to a digital number representing the magnitude of the voltage or current. Typically the digital output is a two’s complement binary number that is proportional to the input, but there are other possibilities.

AD570 8-bit successive-approximation analog-to-digital converter

INTERSIL ICL7107. 31/2 digit single-chip A/D converter

There are several ADC architectures. Due to the complexity and the need for precisely matched components, all but the most specialized ADCs are implemented as integrated circuits (ICs). These typically take the form of metal–oxide–semiconductor (MOS) mixed-signal integrated circuit chips that integrate both analog and digital circuits.

A digital-to-analog converter (DAC) performs the reverse function; it converts a digital signal into an analog signal.

An ADC converts a continuous-time and continuous-amplitude analog signal to a discrete-time and discrete-amplitude digital signal. The conversion involves quantization of the input, so it necessarily introduces a small amount of error or noise. Furthermore, instead of continuously performing the conversion, an ADC does the conversion periodically, sampling the input, limiting the allowable bandwidth of the input signal.

The performance of an ADC is primarily characterized by its bandwidth and signal-to-noise ratio (SNR). The bandwidth of an ADC is characterized primarily by its sampling rate. The SNR of an ADC is influenced by many factors, including the resolution, linearity and accuracy (how well the quantization levels match the true analog signal), aliasing and jitter. The SNR of an ADC is often summarized in terms of its effective number of bits (ENOB), the number of bits of each measure it returns that are on average not noise. An ideal ADC has an ENOB equal to its resolution. ADCs are chosen to match the bandwidth and required SNR of the signal to be digitized. If an ADC operates at a sampling rate greater than twice the bandwidth of the signal, then per the Nyquist–Shannon sampling theorem, near perfect reconstruction is possible. The presence of quantization error limits the SNR of even an ideal ADC. However, if the SNR of the ADC exceeds that of the input signal, its effects may be neglected resulting in an essentially perfect digital representation of the bandlimited analog input signal.

Fig. 1. An 8-level ADC coding scheme

The resolution of the converter indicates the number of different, ie discrete, values it can produce over the allowed range of analog input values. Thus a particular resolution determines the magnitude of the quantization error and therefore determines the maximum possible signal-to-noise ratio for an ideal ADC without the use of oversampling. The input samples are usually stored electronically in binary form within the ADC, so the resolution is usually expressed as the audio bit depth. In consequence, the number of discrete values available is usually a power of two. For example, an ADC with a resolution of 8 bits can encode an analog input to one in 256 different levels (28 = 256). The values can represent the ranges from 0 to 255 (i.e. as unsigned integers) or from −128 to 127 (i.e. as signed integer), depending on the application.

Resolution can also be defined electrically, and expressed in volts. The change in voltage required to guarantee a change in the output code level is called the least significant bit (LSB) voltage. The resolution Q of the ADC is equal to the LSB voltage. The voltage resolution of an ADC is equal to its overall voltage measurement range divided by the number of intervals:

where M is the ADC’s resolution in bits and EFSR is the full scale voltage range (also called ‘span’). EFSR is given by

where VRefHi and VRefLow are the upper and lower extremes, respectively, of the voltages that can be coded.

Normally, the number of voltage intervals is given by

That is, one voltage interval is assigned in between two consecutive code levels.

- Full scale measurement range = 0 to 1 volt
- ADC resolution is 3 bits: 23 = 8 quantization levels (codes)
- ADC voltage resolution, Q = 1 V / 8 = 0.125 V.

In many cases, the useful resolution of a converter is limited by the signal-to-noise ratio (SNR) and other errors in the overall system expressed as an ENOB.

Comparison of quantizing a sinusoid to 64 levels (6 bits) and 256 levels (8 bits). The additive noise created by 6-bit quantization is 12 dB greater than the noise created by 8-bit quantization. When the spectral distribution is flat, as in this example, the 12 dB difference manifests as a measurable difference in the noise floors.

Analog to digital conversion as shown with fig. 1 and fig. 2.

Quantization error is introduced by the quantization inherent in an ideal ADC. It is a rounding error between the analog input voltage to the ADC and the output digitized value. The error is nonlinear and signal-dependent. In an ideal ADC, where the quantization error is uniformly distributed between −1/2 LSB and +1/2 LSB, and the signal has a uniform distribution covering all quantization levels, the signal-to-quantization-noise ratio (SQNR) is given by

where Q is the number of quantization bits. For example, for a 16-bit ADC, the quantization error is 96.3 dB below the maximum level.

Quantization error is distributed from DC to the Nyquist frequency. Consequently, if part of the ADC’s bandwidth is not used, as is the case with oversampling, some of the quantization error will occur out-of-band, effectively improving the SQNR for the bandwidth in use. In an oversampled system, noise shaping can be used to further increase SQNR by forcing more quantization error out of band.

In ADCs, performance can usually be improved using dither. This is a very small amount of random noise (e.g. white noise), which is added to the input before conversion. Its effect is to randomize the state of the LSB based on the signal. Rather than the signal simply getting cut off altogether at low levels, it extends the effective range of signals that the ADC can convert, at the expense of a slight increase in noise. Dither can only increase the resolution of a sampler. It cannot improve the linearity, and thus accuracy does not necessarily improve.

Quantization distortion in an audio signal of very low level with respect to the bit depth of the ADC is correlated with the signal and sounds distorted and unpleasant. With dithering, the distortion is transformed into noise. The undistorted signal may be recovered accurately by averaging over time. Dithering is also used in integrating systems such as electricity meters. Since the values are added together, the dithering produces results that are more exact than the LSB of the analog-to-digital converter.

Dither is often applied when quantizing photographic images to a fewer number of bits per pixel—the image becomes noisier but to the eye looks far more realistic than the quantized image, which otherwise becomes banded. This analogous process may help to visualize the effect of dither on an analog audio signal that is converted to digital.

An ADC has several sources of errors. Quantization error and (assuming the ADC is intended to be linear) non-linearity are intrinsic to any analog-to-digital conversion. These errors are measured in a unit called the least significant bit (LSB). In the above example of an eight-bit ADC, an error of one LSB is 1/256 of the full signal range, or about 0.4%.

All ADCs suffer from nonlinearity errors caused by their physical imperfections, causing their output to deviate from a linear function (or some other function, in the case of a deliberately nonlinear ADC) of their input. These errors can sometimes be mitigated by calibration, or prevented by testing. Important parameters for linearity are integral nonlinearity and differential nonlinearity. These nonlinearities introduce distortion that can reduce the signal-to-noise ratio performance of the ADC and thus reduce its effective resolution.

An analog signal is continuous in time and it is necessary to convert this to a flow of digital values. It is therefore required to define the rate at which new digital values are sampled from the analog signal. The rate of new values is called the sampling rate or sampling frequency of the converter. A continuously varying bandlimited signal can be sampled and then the original signal can be reproduced from the discrete-time values by a reconstruction filter. The Nyquist–Shannon sampling theorem implies that a faithful reproduction of the original signal is only possible if the sampling rate is higher than twice the highest frequency of the signal.

Since a practical ADC cannot make an instantaneous conversion, the input value must necessarily be held constant during the time that the converter performs a conversion (called the conversion time). An input circuit called a sample and hold performs this task—in most cases by using a capacitor to store the analog voltage at the input, and using an electronic switch or gate to disconnect the capacitor from the input. Many ADC integrated circuits include the sample and hold subsystem internally.

An ADC works by sampling the value of the input at discrete intervals in time. Provided that the input is sampled above the Nyquist rate, defined as twice the highest frequency of interest, then all frequencies in the signal can be reconstructed. If frequencies above half the Nyquist rate are sampled, they are incorrectly detected as lower frequencies, a process referred to as aliasing. Aliasing occurs because instantaneously sampling a function at two or fewer times per cycle results in missed cycles, and therefore the appearance of an incorrectly lower frequency. For example, a 2 kHz sine wave being sampled at 1.5 kHz would be reconstructed as a 500 Hz sine wave.

To avoid aliasing, the input to an ADC must be low-pass filtered to remove frequencies above half the sampling rate. This filter is called an anti-aliasing filter, and is essential for a practical ADC system that is applied to analog signals with higher frequency content. In applications where protection against aliasing is essential, oversampling may be used to greatly reduce or even eliminate it.

- Oversampling can make it easier to realize analog anti-aliasing filters
- Improved audio bit depth
- Reduced noise, especially when noise shaping is employed in addition to oversampling.

### Relative speed and precision

The speed of an ADC varies by type. The Wilkinson ADC is limited by the clock rate which is processable by current digital circuits. For a successive-approximation ADC, the conversion time scales with the logarithm of the resolution, i.e. the number of bits. Flash ADCs are certainly the fastest type of the three; The conversion is basically performed in a single parallel step.

### Sliding scale principle

These are several common ways of implementing an electronic ADC.

### RC charge time

Resistor-capacitor (RC) circuits have a known voltage charging and discharging curve that can be used to solve for an unknown analog value.

#### Measuring analog resistance or capacitance

If the analog value to measure is represented by a resistance or capacitance, then by including that element in an RC circuit (with other resistances or capacitances fixed) and measuring the time to charge the capacitance from a known starting voltage to another known ending voltage through the resistance from a known voltage supply, the value of the unknown resistance or capacitance can be determined using the capacitor charging equation:

and solving for the unknown resistance or capacitance using those starting and ending datapoints. This is similar but contrasts to the Wilkinson ADC which measures an unknown voltage with a known resistance and capacitance, by instead measuring an unknown resistance or capacitance with a known voltage.

For example, the positive (and/or negative) pulse width from a 555 Timer IC in monostable or astable mode represents the time it takes to charge (and/or discharge) its capacitor from Vsupply to Vsupply. By sending this pulse into a microcontroller with an accurate clock, the duration of the pulse can be measured and converted using the capacitor charging equation to produce the value of the unknown resistance or capacitance.

Larger resistances and capacitances will take a longer time to measure than smaller one. And the accuracy is limited by the accuracy of the microcontroller clock and the amount of time available to measure the value, which potentially might even change during measurement or be affected by external parasitics.

A direct-conversion or flash ADC has a bank of comparators sampling the input signal in parallel, each firing for a specific voltage range. The comparator bank feeds a digital encoder logic circuit that generates a binary number on the output lines for each voltage range.

ADCs of this type have a large die size and high power dissipation. They are often used for video, wideband communications, or other fast signals in optical and magnetic storage.

The circuit consists of a resistive divider network, a set of op-amp comparators and a priority encoder. A small amount of hysteresis is built into the comparator to resolve any problems at voltage boundaries. At each node of the resistive divider, a comparison voltage is available. The purpose of the circuit is to compare the analog input voltage with each of the node voltages.

The circuit has the advantage of high speed as the conversion takes place simultaneously rather than sequentially. Typical conversion time is 100 ns or less. Conversion time is limited only by the speed of the comparator and of the priority encoder. This type of ADC has the disadvantage that the number of comparators required almost doubles for each added bit. Also, the larger the value of n, the more complex is the priority encoder.

A successive-approximation ADC uses a comparator and a binary search to successively narrow a range that contains the input voltage. At each successive step, the converter compares the input voltage to the output of an internal digital-to-analog converter (DAC) which initially represents the midpoint of the allowed input voltage range. At each step in this process, the approximation is stored in a successive approximation register (SAR) and the output of the digital-to-analog converter is updated for a comparison over a narrower range.

An integrating ADC (also dual-slope or multi-slope ADC) applies the unknown input voltage to the input of an integrator and allows the voltage to ramp for a fixed time period (the run-up period). Then a known reference voltage of opposite polarity is applied to the integrator and is allowed to ramp until the integrator output returns to zero (the run-down period). The input voltage is computed as a function of the reference voltage, the constant run-up time period, and the measured run-down time period. The run-down time measurement is usually made in units of the converter’s clock, so longer integration times allow for higher resolutions. Likewise, the speed of the converter can be improved by sacrificing resolution. Converters of this type (or variations on the concept) are used in most digital voltmeters for their linearity and flexibility.

Charge balancing ADC

The principle of charge balancing ADC is to first convert the input signal to a frequency using a voltage-to-frequency converter. This frequency is then measured by a counter and converted to an output code proportional to the analog input. The main advantage of these converters is that it is possible to transmit frequency even in a noisy environment or in isolated form. However, the limitation of this circuit is that the output of the voltage-to-frequency converter depends upon an RC product whose value cannot be accurately maintained over temperature and time.

The analog part of the circuit consists of a high input impedance buffer, precision integrator and a voltage comparator. The converter first integrates the analog input signal for a fixed duration and then it integrates an internal reference voltage of opposite polarity until the integrator output is zero. The main disadvantage of this circuit is the long duration time. They are particularly suitable for accurate measurement of slowly varying signals such as thermocouples and weighing scales.

A delta-encoded or counter-ramp ADC has an up-down counter that feeds a DAC. The input signal and the DAC both go to a comparator. The comparator controls the counter. The circuit uses negative feedback from the comparator to adjust the counter until the DAC’s output matches the input signal and number is read from the counter. Delta converters have very wide ranges and high resolution, but the conversion time is dependent on the input signal behavior, though it will always have a guaranteed worst-case. Delta converters are often very good choices to read real-world signals as most signals from physical systems do not change abruptly. Some converters combine the delta and successive approximation approaches; this works especially well when high frequency components of the input signal are known to be small in magnitude.

A pipelined ADC (also called subranging quantizer) uses two or more conversion steps. First, a coarse conversion is done. In a second step, the difference to the input signal is determined with a DAC. This difference is then converted more precisely, and the results are combined in the last step. This can be considered a refinement of the successive-approximation ADC wherein the feedback reference signal consists of the interim conversion of a whole range of bits (for example, four bits) rather than just the next-most-significant bit. By combining the merits of the successive approximation and flash ADCs this type is fast, has a high resolution, and can be implemented efficiently.

A delta-sigma ADC (also known as a sigma-delta ADC) is based on a feedback loop with an analog filter and low resolution (often 1 bit), but high speed ADC and DAC to approximate the incoming signal. The filter (usually a 2nd order low pass filter) in the loop performs noise shaping: the quantization noise originating from the DAC is no longer evenly distributed over the frequencies, but higher for the high frequencies and reduced for the low frequencies.

A digital filter (decimation filter) than removes much of the higher frequencies (especially much of the quantization noise) and converts the data stream from high sampling rate and low resolution to low speed and high resolution.

### Intermediate FM stage

A Time-stretch analog-to-digital converter (TS-ADC) digitizes a very wide bandwidth analog signal, that cannot be digitized by a conventional electronic ADC, by time-stretching the signal prior to digitization. It commonly uses a photonic preprocessor to time-stretch the signal, which effectively slows the signal down in time and compresses its bandwidth. As a result, an electronic ADC, that would have been too slow to capture the original signal, can now capture this slowed-down signal. For continuous capture of the signal, the frontend also divides the signal into multiple segments in addition to time-stretching. Each segment is individually digitized by a separate electronic ADC. Finally, a digital signal processor rearranges the samples and removes any distortions added by the preprocessor to yield the binary data that is the digital representation of the original analog signal.

In many cases, the most expensive part of an integrated circuit is the pins, because they make the package larger, and each pin has to be connected to the integrated circuit’s silicon. To save pins, it is common for ADCs to send their data one bit at a time over a serial interface to the computer, with each bit coming out when a clock signal changes state. This saves quite a few pins on the ADC package, and in many cases, does not make the overall design any more complex.

Commercial ADCs often have several inputs that feed the same converter, usually through an analog multiplexer. Different models of ADC may include sample and hold circuits, instrumentation amplifiers or differential inputs, where the quantity measured is the difference between two inputs.

Analog-to-digital converters are integral to modern music reproduction technology and digital audio workstation-based sound recording. Music may be produced on computers using an analog recording and therefore analog-to-digital converters are needed to create the pulse-code modulation (PCM) data streams that go onto compact discs and digital music files. The current crop of analog-to-digital converters utilized in music can sample at rates up to 192 kilohertz. Many recording studios record in 24-bit/96 kHz pulse-code modulation (PCM) format and then downsample and dither the signal for Compact Disc Digital Audio production (44.1 kHz) or to 48 kHz for radio and television broadcast applications.

### Digital signal processing

ADCs are required in digital signal processing systems that process, store, or transport virtually any analog signal in digital form. TV tuner cards, for example, use fast video analog-to-digital converters. Slow on-chip 8-, 10-, 12-, or 16-bit analog-to-digital converters are common in microcontrollers. Digital storage oscilloscopes need very fast analog-to-digital converters, also crucial for software-defined radio and their new applications.

Digital imaging systems commonly use analog-to-digital converters for digitizing pixels. Some radar systems use analog-to-digital converters to convert signal strength to digital values for subsequent signal processing. Many other in situ and remote sensing systems commonly use analogous technology.

Many sensors in scientific instruments produce an analog signal; temperature, pressure, pH, light intensity etc. All these signals can be amplified and fed to an ADC to produce a digital representation.

Some non-electronic or only partially electronic devices, such as rotary encoders, can also be considered ADCs. Typically the digital output of an ADC will be a two’s complement binary number that is proportional to the input. An encoder might output a Gray code.

Flat-panel displays are inherently digital and need an ADC to process an analog signal such as composite or VGA.

Testing an analog-to-digital converter requires an analog input source and hardware to send control signals and capture digital data output. Some ADCs also require an accurate source of reference signal.

The key parameters to test an ADC are:

- DC offset error
- DC gain error
- signal-to-noise ratio (SNR)
- Total harmonic distortion (THD)
- Integral nonlinearity (INL)
- Differential nonlinearity (DNL)
- Spurious free dynamic range
- Power dissipation

- Knoll, Glenn F. (1989). Radiation Detection and Measurement (2nd ed.). New York: John Wiley & Sons. ISBN 978-0471815044.
- Nicholson, P. W. (1974). Nuclear Electronics. New York: John Wiley & Sons. pp. 315–316. ISBN 978-0471636977.

- Allen, Phillip E.; Holberg, Douglas R. (2002). CMOS Analog Circuit Design. ISBN 978-0-19-511644-1.
- Fraden, Jacob (2010). Handbook of Modern Sensors: Physics, Designs, and Applications. Springer. ISBN 978-1441964656.
- Kester, Walt, ed. (2005). The Data Conversion Handbook. Elsevier: Newnes. ISBN 978-0-7506-7841-4.
- Johns, David; Martin, Ken (1997). Analog Integrated Circuit Design. ISBN 978-0-471-14448-9.
- Liu, Mingliang (2006). Demystifying Switched-Capacitor Circuits. ISBN 978-0-7506-7907-7.
- Norsworthy, Steven R.; Schreier, Richard; Temes, Gabor C. (1997). Delta-Sigma Data Converters. IEEE Press. ISBN 978-0-7803-1045-2.
- Razavi, Behzad (1995). Principles of Data Conversion System Design. New York, NY: IEEE Press. ISBN 978-0-7803-1093-3.
- Ndjountche, Tertulien (May 24, 2011). CMOS Analog Integrated Circuits: High-Speed and Power-Efficient Design. Boca Raton, FL: CRC Press. ISBN 978-1-4398-5491-4.
- Staller, Len (February 24, 2005). “Understanding analog to digital converter specifications”. Embedded Systems Design.
- Walden, R. H. (1999). “Analog-to-digital converter survey and analysis”. IEEE Journal on Selected Areas in Communications. 17 (4): 539–550. CiteSeerX . doi:10.1109/49.761034.

- An Introduction to Delta Sigma Converters A very nice overview of Delta-Sigma converter theory.
- Which ADC Architecture Is Right for Your Application? article by Walt Kester
- ADC and DAC Glossary at the Wayback Machine (archived 2009-11-24) Defines commonly used technical terms
- Introduction to ADC in AVR – Analog to digital conversion with Atmel microcontrollers
- Signal processing and system aspects of time-interleaved ADCs
- MATLAB Simulink model of a simple ramp ADC

Look up ADC in Wiktionary, the free dictionary.

ADC may refer to:

- Adlington (Cheshire) railway station, UK (National Rail code)
- Aid to Dependent Children, an American government social program from 1935 to 1960
- Aide-de-camp, assistant to a senior military or government person
- Alternative Daily cover, material other than soil for containment in a landfill
- Andakombe Airport, airport in Papua New Guinea (IATA: ADC)
- Andrew Dice Clay (born 1957), American comedian
- A.DC., taxonomic author abbreviation for Alphonse Pyramus de Candolle (1806–1893), French-Swiss botanist
- Axiom of dependent choice